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Ahmet Unutulmaz
Ahmet Unutulmaz
Verified email at tubitak.gov.tr - Homepage
Title
Cited by
Cited by
Year
LDS-A description script for layout templates
A Unutulmaz, G Dündar, FV Fernández
2011 20th European Conference on Circuit Theory and Design (ECCTD), 857-860, 2011
202011
A two-step layout-in-the-loop design automation tool
G Berkol, A Unutulmaz, E Afacan, G Dündar, FV Fernandez, AE Pusane, ...
2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), 1-4, 2015
192015
A template router
A Unutulmaz, G Dündar, FV Fernández
2011 20th European Conference on Circuit Theory and Design (ECCTD), 334-337, 2011
172011
Template coding with LDS and applications of LDS in EDA
A Unutulmaz, G Dündar, FV Fernández
Analog Integrated Circuits and Signal Processing 78, 137-151, 2014
92014
Area optimization on fixed analog floorplans using convex area functions
A Unutulmaz, G Dündar, FV Fernández
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
92013
Analysis of NBTI effects on high frequency digital circuits
A Unutulmaz, D Helms, R Eilers, M Metzdorf, B Kaczer, W Nebel
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 223-228, 2016
72016
LDS based tools to ease template construction
A Unutulmaz, G Dündar, FV Fernández
2012 International Conference on Synthesis, Modeling, Analysis and …, 2012
62012
Implementation and applications of a ternary threshold logic gate
A Unutulmaz, C Ünsalan
Circuits, Systems, and Signal Processing 43 (2), 1192-1207, 2024
52024
On the convex formulation of area for slicing floorplans
A Unutulmaz, G Dündar, FV Fernandez
Integration 50, 74-80, 2015
52015
User dependent aging prediction model for automotive controllers with power electronics
S Malipatlolla, A Unutulmaz, D Helms, W Nebel
2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017
32017
Reconfigurable Multiple-Valued Logic Function and Sequential Circuit Realizations via Threshold Logic Gates
A Unutulmaz, C Ünsalan
arXiv preprint arXiv:2404.06420, 2024
2024
Enhanced layout-aware circuit/system synthesis
A Unutulmaz
Fen Bilimleri Enstitüsü, 2015
2015
Routing Analog Circuits
G Dündar, A Unutulmaz
Analog Layout Synthesis: A Survey of Topological Approaches, 149-201, 2010
2010
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Articles 1–13