| Low-cost thin glass interposers as a superior alternative to silicon and organic interposers for packaging of 3-D ICs V Sukumaran, T Bandyopadhyay, V Sundaram, R Tummala IEEE Transactions on Components, Packaging and Manufacturing Technology 2 (9 …, 2012 | 232 | 2012 |
| Introduction to the System-on-Package (SOP) Technology R Tummala, T Bandyopadhyay Introduction to System-On-Package (SOP): Miniaturization of the Entire System, 2008 | 225* | 2008 |
| Electrical modeling of through silicon and package vias T Bandyopadhyay, R Chatterjee, D Chung, M Swaminathan, R Tummala 2009 IEEE International Conference on 3D System Integration, 1-8, 2009 | 147 | 2009 |
| Through-package-via formation and metallization of glass interposers V Sukumaran, Q Chen, F Liu, N Kumbhat, T Bandyopadhyay, H Chan, ... 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC …, 2010 | 143 | 2010 |
| Through-package-via formation and metallization of glass interposers V Sukumaran, Q Chen, F Liu, N Kumbhat, T Bandyopadhyay, H Chan, ... 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC …, 2010 | 143 | 2010 |
| Electromagnetic modeling of through-silicon via (TSV) interconnections using cylindrical modal basis functions KJ Han, M Swaminathan, T Bandyopadhyay IEEE Transactions on Advanced Packaging 33 (4), 804-817, 2010 | 127 | 2010 |
| Rigorous electrical modeling of through silicon vias (TSVs) with MOS capacitance effects T Bandyopadhyay, KJ Han, D Chung, R Chatterjee, M Swaminathan, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (6 …, 2011 | 119 | 2011 |
| Design, fabrication and characterization of low-cost glass interposers with fine-pitch through-package-vias V Sukumaran, T Bandyopadhyay, Q Chen, N Kumbhat, F Liu, R Pucha, ... 2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 583-588, 2011 | 94 | 2011 |
| Trend from ICs to 3D ICs to 3D systems RR Tummala, V Sundaram, R Chatterjee, PM Raj, N Kumbhat, ... 2009 IEEE Custom Integrated Circuits Conference, 439-444, 2009 | 68 | 2009 |
| Ultra-high I/O density glass/silicon interposers for high bandwidth smart mobile applications G Kumar, T Bandyopadhyay, V Sukumaran, V Sundaram, SK Lim, ... 2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 217-223, 2011 | 59 | 2011 |
| Design and demonstration of low cost, panel-based polycrystalline silicon interposer with through-package-vias (TPVs) Q Chen, T Bandyopadhyay, Y Suzuki, F Liu, V Sundaram, R Pucha, ... 2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 855-860, 2011 | 28 | 2011 |
| Electrical modeling of annular and co-axial TSVs considering MOS capacitance effects T Bandyopadhyay, R Chatterjee, D Chung, M Swaminathan, R Tummala Electrical Performance of Electronic Packaging and Systems, 2009. EPEPS'09 …, 2009 | 24 | 2009 |
| Enhancing signal and power integrity using double sided silicon interposer V Sridharan, M Swaminathan, T Bandyopadhyay IEEE microwave and wireless components letters 21 (11), 598-600, 2011 | 22 | 2011 |
| Modeling, design, and characterization of through vias in silicon and glass interposers T Bandyopadhyay Georgia Institute of Technology, 2011 | 16 | 2011 |
| Techniques for correlating power distribution network simulations with physical measurements F Cano, K Lavery, S Sinha, T Bandyopadhyay, B McCracken, S Stelmach 2023 IEEE 27th Workshop on Signal and Power Integrity (SPI), 1-4, 2023 | 1 | 2023 |
| Electronic substrate having differential coaxial vias S Sinha, T Bandyopadhyay, MR Kulkarni US Patent App. 18/353,295, 2023 | | 2023 |
| Electronic substrate having differential coaxial vias S Sinha, T Bandyopadhyay, MR Kulkarni US Patent 11,800,636, 2023 | | 2023 |
| Electronic substrate having differential coaxial vias S Sinha, T Bandyopadhyay, MR Kulkarni US Patent 11,160,163, 2021 | | 2021 |
| Deep dive into DDR3 interface jitter contributors SM Stalin, K Scholz, T Bandyopadhyay, S Moharil, S Sinha, R DeMoor 2017 IEEE 21st Workshop on Signal and Power Integrity (SPI), 1-4, 2017 | | 2017 |
| Signal integrity analysis of serpentine traces in IC packages A Datta, N Datta, T Bandyopadhyay, S Sinha 2016 IEEE Dallas Circuits and Systems Conference (DCAS), 1-4, 2016 | | 2016 |
Rao TummalaVerified email at ece.gatech.edu
