Effective Method for Simultaneous Gate Sizing and th Assignment Using Lagrangian Relaxation G Flach, T Reimann, G Posser, M Johann, R Reis IEEE transactions on computer-aided design of integrated circuits and …, 2014 | 63 | 2014 |
Design of very deep pipelined multipliers for FPGAs A Panato, S Silva, F Wagner, M Johann, R Reis, S Bampi Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 37 | 2004 |
Rsyn: An extensible physical synthesis framework G Flach, M Fogaça, J Monteiro, M Johann, R Reis Proceedings of the 2017 ACM on International Symposium on Physical Design, 33-40, 2017 | 32 | 2017 |
Net by net routing with a new path search algorithm M Johann, R Reis Proceedings 13th Symposium on Integrated Circuits and Systems Design (Cat …, 2000 | 32 | 2000 |
Drive strength aware cell movement techniques for timing driven placement G Flach, M Fogaça, J Monteiro, M Johann, R Reis Proceedings of the 2016 on International Symposium on Physical Design, 73-80, 2016 | 28 | 2016 |
Ecologically grounded multimodal design: The Palafito 1.0 study D Keller, J Timoney, L Costalonga, A Capasso, P Tinajero, V Lazzarini, ... | 28 | 2014 |
Jezz: An effective legalization algorithm for minimum displacement JC Puget, G Flach, M Johann, R Reis Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 1-5, 2015 | 27 | 2015 |
Interaction aesthetics and ubiquitous music D Keller, N Otero, V Lazzarini, MS Pimenta, MH de Lima, M Johann, ... Creativity in the digital age, 91-105, 2015 | 27 | 2015 |
A hybrid technique for discrete gate sizing based on lagrangian relaxation VS Livramento, C Guth, JL Guentzel, MO Johann ACM Transactions on Design Automation of Electronic Systems (TODAES) 19 (4 …, 2014 | 25 | 2014 |
Relational properties in interaction aesthetics: The ubiquitous music turn D Keller, N Otero, V Lazzarini, MS Pimenta, MH de Lima, M Johann, ... Electronic Visualisation and the Arts (EVA 2014), 2014 | 25 | 2014 |
Simultaneous gate sizing and vt assignment using fanin/fanout ratio and simulated annealing T Reimann, G Posser, G Flach, M Johann, R Reis 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2549-2552, 2013 | 24 | 2013 |
Maze routing steiner trees with effective critical sink optimization RF Hentschke, J Narasimham, MO Johann, RL Reis Proceedings of the 2007 international symposium on Physical design, 135-142, 2007 | 23 | 2007 |
Fast and efficient lagrangian relaxation-based discrete gate sizing VS Livramento, C Guth, JL Güntzel, MO Johann 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 22 | 2013 |
Maze routing Steiner trees with delay versus wire length tradeoff R Hentschke, J Narasimhan, M Johann, R Reis IEEE transactions on very large scale integration (VLSI) systems 17 (8 …, 2009 | 16 | 2009 |
Methods and apparatus for providing flexible timing-driven routing trees RF Hentschke, MDO Johann, J Narasimhan, RADL Reis US Patent 8,095,904, 2012 | 15 | 2012 |
Ecocompositional techniques in ubiquitous music practices in educational settings: Sonic sketching MH Lima, D Keller, N Otero, MS Pimenta, V Lazzarini, M Johann, ... Proceedings of the SEMPRE (MET2014): Researching Music, Education …, 2014 | 13 | 2014 |
Methods and apparatus for providing flexible timing-driven routing trees RF Hentschke, M de Oliveira Johann, J Narasimhan, RADL Reis US Patent 7,571,411, 2009 | 12 | 2009 |
An algorithm for i/o pins partitioning targeting 3d vlsi integrated circuits S Sawicki, R Hentschke, M Johann, R Reis 2006 49th IEEE International Midwest Symposium on Circuits and Systems 2 …, 2006 | 12 | 2006 |
Suporte para a criatividade musical cotidiana: mixDroid segunda geração FM Farias | 11 | 2015 |
A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits S Sawicki, G Wilke, M Johann, R Reis 2009 16th IEEE International Conference on Electronics, Circuits and Systems …, 2009 | 11 | 2009 |