Ik Joon Chang
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A 32 kb 10T sub-threshold SRAM array with bit-interleaving and differential read scheme in 90 nm CMOS
IJ Chang, JJ Kim, SP Park, K Roy
IEEE Journal of Solid-State Circuits 44 (2), 650-658, 2009
A priority-based 6T/8T hybrid SRAM architecture for aggressive voltage scaling in video applications
IJ Chang, D Mohapatra, K Roy
IEEE transactions on circuits and systems for video technology 21 (2), 101-112, 2011
Exploring asynchronous design techniques for process-tolerant and energy-efficient subthreshold operation
IJ Chang, SP Park, K Roy
IEEE Journal of Solid-State Circuits 45 (2), 401-410, 2010
We-quatro: Radiation-hardened SRAM cell with parametric process variation tolerance
JS Kim, IJ Chang
IEEE Transactions on Nuclear Science 64 (9), 2489-2496, 2017
Heterogeneous SRAM cell sizing for low-power H. 264 applications
J Kwon, IJ Chang, I Lee, H Park, J Park
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (10), 2275-2284, 2012
An approximate memory architecture for a reduction of refresh power consumption in deep learning applications
DT Nguyen, H Kim, HJ Lee, IJ Chang
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
PVT-aware leakage reduction for on-die caches with improved read stability
CH Kim, JJ Kim, IJ Chang, K Roy
IEEE Journal of Solid-State Circuits 41 (1), 170-178, 2005
A 64Gb 533Mb/s DDR interface MLC NAND flash in sub-20nm technology
D Lee, IJ Chang, SY Yoon, J Jang, DS Jang, WG Hahn, JY Park, DG Kim, ...
2012 IEEE International Solid-State Circuits Conference, 430-432, 2012
Robust level converter for sub-threshold/super-threshold operation: 100 mV to 2.5 v
IJ Chang, J Kim, K Kim, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (8 …, 2010
Robust level converter design for sub-threshold logic
IJ Chang, JJ Kim, K Roy
Proceedings of the 2006 international symposium on Low power electronics and …, 2006
TCL: an ANN-to-SNN conversion with trainable clipping layers
ND Ho, IJ Chang
2021 58th ACM/IEEE Design Automation Conference (DAC), 793-798, 2021
STT-BNN: A novel STT-MRAM in-memory computing macro for binary neural networks
TN Pham, QK Trinh, IJ Chang, M Alioto
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12 (2 …, 2022
An accurate compact model considering direct-channel interference of adjacent cells in sub-30-nm NAND flash technologies
M Kang, IH Park, IJ Chang, K Lee, S Seo, BG Park, H Shin
IEEE electron device letters 33 (8), 1114-1116, 2012
0.2 V 8T SRAM with PVT-aware bitline sensing and column-based data randomization
AT Do, ZC Lee, B Wang, IJ Chang, X Liu, TTH Kim
IEEE Journal of Solid-State Circuits 51 (6), 1487-1498, 2016
Fast and accurate estimation of nano-scaled SRAM read failure probability using critical point sampling
IJ Chang, K Kang, S Mukhopadhyay, CH Kim, K Roy
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005 …, 2005
Studying the variation effects of radiation hardened Quatro SRAM bit-cell
M Kang, J Kim, IJ Chang
IEEE Transactions on Nuclear Science 63 (4), 2399-2401, 2016
A voltage-scalable & process variation resilient hybrid SRAM architecture for MPEG-4 video processors
IJ Chang, D Mohapatra, K Roy
Proceedings of the 46th Annual Design Automation Conference, 670-675, 2009
St-DRC: Stretchable DRAM refresh controller with no parity-overhead error correction scheme for energy-efficient DNNs
DT Nguyen, NM Ho, IJ Chang
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
On-chip sensor for measuring dynamic power supply noise of the semiconductor chip
L Chua-Eoan, B Andreev, C Phan, A Shayan, X Kong, M Popovich, ...
US Patent 8,497,694, 2013
A 2-Kb One-Time Programmable Memory for UHF Passive RFID Tag IC in a Standard 0.18/spl mu/m CMOS Process
ND Phan, IJ Chang, JW Lee
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (7), 1810-1822, 2013
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