14.6 a 1.42 tops/w deep convolutional neural network recognition processor for intelligent ioe systems J Sim, JS Park, M Kim, D Bae, Y Choi, LS Kim 2016 IEEE International Solid-State Circuits Conference (ISSCC), 264-265, 2016 | 215 | 2016 |
7.1 An 11.5 TOPS/W 1024-MAC butterfly structure dual-core sparsity-aware neural processing unit in 8nm flagship mobile SoC J Song, Y Cho, JS Park, JW Jang, S Lee, JH Song, JG Lee, I Kang 2019 IEEE international solid-state circuits conference-(ISSCC), 130-132, 2019 | 143 | 2019 |
Sparsity-aware and re-configurable NPU architecture for Samsung flagship mobile SoC JW Jang, S Lee, D Kim, H Park, AS Ardestani, Y Choi, C Kim, Y Kim, H Yu, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 105 | 2021 |
9.5 A 6K-MAC feature-map-sparsity-aware neural processing unit in 5nm flagship mobile SoC JS Park, JW Jang, H Lee, D Lee, S Lee, H Jung, S Lee, S Kwon, K Jeong, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 152-154, 2021 | 55 | 2021 |
A multi-mode 8k-mac hw-utilization-aware neural processing unit with a unified multi-precision datapath in 4-nm flagship mobile soc JS Park, C Park, S Kwon, T Jeon, Y Kang, H Lee, D Lee, J Kim, HS Kim, ... IEEE Journal of Solid-State Circuits 58 (1), 189-202, 2022 | 46 | 2022 |
A Multi-Mode 8k-MAC HW-Utilization-Aware Neural Processing Unit With a Unified Multi-Precision Datapath in 4-nm Flagship Mobile SoC JS Park, C Park, S Kwon, T Jeon, Y Kang, H Lee, D Lee, J Kim, HS Kim, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC), 2022 | 46 | 2022 |
WINOGRAD TRANSFORM CONVOLUTION OPERATIONS FOR NEURAL NETWORKS JS Park US Patent App. 16/747,076, 2020 | 34 | 2020 |
A 182 mW 94.3 f/s in Full HD Pattern-Matching Based Image Recognition Accelerator for an Embedded Vision System in 0.13- CMOS Technology JS Park, HE Kim, LS Kim IEEE transactions on circuits and systems for video technology 23 (5), 832-845, 2012 | 32 | 2012 |
A unified graphics and vision processor with a 0.89/spl mu/W/fps pose estimation engine for augmented reality JS Yoon, JH Kim, HE Kim, WY Lee, SH Kim, K Chung, JS Park, LS Kim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (2), 206-216, 2012 | 24 | 2012 |
APPARATUS FOR PERFORMING NEURAL NETWORK OPERATION AND METHOD OF OPERATING THE SAME JS Park US Patent 11,074,474, 2019 | 23 | 2019 |
Homogeneous stream processors with embedded special function units for high-utilization programmable shaders YJ Kim, HE Kim, SH Kim, JS Park, S Paek, LS Kim IEEE transactions on very large scale integration (VLSI) systems 20 (9 …, 2011 | 22 | 2011 |
All-digital hybrid temperature sensor network for dense thermal monitoring S Paek, W Shin, J Lee, HE Kim, JS Park, LS Kim 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 19 | 2013 |
A vision processor with a unified interest-point detection and matching hardware for accelerating a stereo-matching algorithm JS Park, HE Kim, HY Kim, J Lee, LS Kim IEEE Transactions on Circuits and Systems for Video Technology 26 (12), 2328 …, 2015 | 15 | 2015 |
Hybrid temperature sensor network for area-efficient on-chip thermal map sensing S Paek, W Shin, J Lee, HE Kim, JS Park, LS Kim IEEE Journal of Solid-State Circuits 50 (2), 610-618, 2015 | 14 | 2015 |
A 5-Gb/s 2.67-mW/Gb/s digital clock and data recovery with hybrid dithering using a time-dithered delta–sigma modulator T Lee, YH Kim, J Sim, JS Park, LS Kim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (4 …, 2015 | 13 | 2015 |
A graphics and vision unified processor with 0.89 µW/fps pose estimation engine for augmented reality JS Yoon, JH Kim, HE Kim, WY Lee, SH Kim, K Chung, JS Park, LS Kim 2010 IEEE International Solid-State Circuits Conference-(ISSCC), 336-337, 2010 | 13 | 2010 |
A 275mW heterogeneous multimedia processor for IC-stacking on Si-interposer HE Kim, JS Yoon, KD Hwang, YJ Kim, JS Park, LS Kim 2011 IEEE International Solid-State Circuits Conference, 128-130, 2011 | 11 | 2011 |
A reconfigurable heterogeneous multimedia processor for IC-stacking on Si-interposer HE Kim, JS Yoon, KD Hwang, YJ Kim, JS Park, LS Kim IEEE transactions on circuits and systems for video technology 22 (4), 589-604, 2011 | 10 | 2011 |
NEURAL NETWORK PROCESSING UNIT INCLUDING APPROXIMATE MULTIPLIER AND SYSTEM ON CHIP INCLUDING THE SAME JS Park US Patent App. 16/239,046, 2019 | 5 | 2019 |
Arithmetic apparatus, operating method thereof, and neural network processor S Jinook, D Kim, J Park, S Joonho, S Lee, J Junwoo, Y Cho US Patent App. 16/989,391, 2021 | 4 | 2021 |