Ganesh Hegde
Ganesh Hegde
Advanced Logic Lab, Samsung Semiconductor Inc
Verified email at
Cited by
Cited by
Efficient and realistic device modeling from atomic detail to the nanoscale
JE Fonseca, T Kubis, M Povolotskyi, B Novakovic, A Ajoy, G Hegde, ...
Journal of Computational Electronics 12 (4), 592-600, 2013
Machine-learned approximations to density functional theory hamiltonians
G Hegde, RC Bowen
Scientific reports 7 (1), 42669, 2017
III–V FET channel designs for high current densities and thin inversion layers
M Rodwell, W Frensley, S Steiger, E Chagarov, S Lee, H Ryu, Y Tan, ...
68th Device Research Conference, 149-152, 2010
An environment-dependent semi-empirical tight binding model suitable for electron transport in bulk metals, metal alloys, metallic interfaces, and metallic nanostructures. II …
G Hegde, M Povolotskyi, T Kubis, J Charles, G Klimeck
Journal Of Applied Physics 115 (12), 123704, 2014
Lower limits of line resistance in nanocrystalline back end of line Cu interconnects
G Hegde, RC Bowen, MS Rodder
Applied Physics Letters 109 (193106), 2016
Physical modeling of electronic devices/systems
G Klimeck, M Povolotskyi, TC Kubis, G Hegde
US Patent 9,858,365, 2018
Structure and method to achieve compressively strained Si NS
JA Kittl, G Hegde, RC Bowen, BJ Obradovic, MS Rodder
US Patent 9,831,323, 2017
Effect of realistic metal electronic structure on the lower limit of contact resistivity of epitaxial metal-semiconductor contacts
G Hegde, R Chris Bowen
Applied Physics Letters 105 (5), 2014
III-V MOSFETs: Scaling laws, scaling limits, fabrication processes
MJW Rodwell, U Singisetti, M Wistey, GJ Burek, A Carter, A Baraskar, ...
2010 22nd International Conference on Indium Phosphide and Related Materials …, 2010
Scaling effect on specific contact resistivity in nano-scale metal-semiconductor contacts
SH Park, N Kharche, D Basu, Z Jiang, SK Nayak, CE Weber, G Hegde, ...
71st Device Research Conference, 125-126, 2013
Low resistivity damascene interconnect
G Hegde, MS Rodder, JA Kittl, RC Bowen
US Patent 9,613,907, 2017
Role of surface orientation on atomic layer deposited Al2O3/GaAs interface structure and Fermi level pinning: A density functional theory study
G Hegde, G Klimeck, A Strachan
Applied Physics Letters 99 (9), 2011
Generative structure-property inverse computational co-design of materials
G Hegde, HS Simka
US Patent 11,537,898, 2022
Metal oxysilicate diffusion barriers for damascene metallization with low RC delays and methods for forming the same
G Hegde, M Rodder, R Sengupta, C Bowen
US Patent 9,728,502, 2017
Fabricating metal source-drain stressor in a MOS device channel
JA Kittl, G Hegde, MS Rodder
US Patent 9,634,140, 2017
Structure and method to achieve large strain in NS without addition of stack-generated defects
JA Kittl, G Hegde, RC Bowen, MS Rodder
US Patent 10,283,638, 2019
Is electron transport in nanocrystalline Cu interconnects surface dominated or grain boundary dominated?
G Hegde, RC Bowen, MS Rodder
2016 IEEE International Interconnect Technology Conference/Advanced …, 2016
The nanoelectronic modeling tool nemo 5: Capabilities, validation, and application to sb-heterostructures
S Steiger, M Povolotskyi, HH Park, T Kubis, G Hegde, B Haley, M Rodwell, ...
69th Device Research Conference, 23-26, 2011
On the feasibility of ab initio electronic structure calculations for Cu using a single s orbital basis
G Hegde, RC Bowen
AIP Advances 5 (10), 2015
Enhancement of thermoelectric efficiency by uniaxial tensile stress in n-type GaAs nanowires
A Paul, K Miao, G Hegde, S Mehrotra, M Luisier, G Klimeck
2011 11th IEEE International Conference on Nanotechnology, 1352-1357, 2011
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