Fixing design errors with counterexamples and resynthesis KH Chang, IL Markov, V Bertacco Proceedings of the 2007 Asia and South Pacific Design Automation Conference …, 2007 | 115 | 2007 |
Automating post-silicon debugging and repair K Chang, IL Markov, V Bertacco 2007 IEEE/ACM International Conference on Computer-Aided Design, 91-98, 2007 | 108 | 2007 |
Automatic Post-Silicon Debugging and Repair K Chang, I Markov, V Bertacco International Workshop on Logic Synthesis, 2007 | 108 | 2007 |
Automatic error diagnosis and correction for RTL designs K Chang, I Wagner, V Bertacco, IL Markov High Level Design Validation and Test Workshop, 2007. HLVDT 2007. IEEE …, 2007 | 67 | 2007 |
Simulation-based bug trace minimization with BMC-based refinement K Chang, V Bertacco, IL Markov IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007 | 64 | 2007 |
Node Mergers in the Presence of Don't Cares SM Plaza, K Chang, IL Markov, V Bertacco 2007 Asia and South Pacific Design Automation Conference, 414-419, 2007 | 53 | 2007 |
Reap what you sow: spare cells for post-silicon metal fix K Chang, IL Markov, V Bertacco Proceedings of the 2008 international symposium on Physical design, 103-110, 2008 | 31 | 2008 |
Post-placement rewiring and rebuffering by exhaustive search for functional symmetries K Chang, IL Markov, V Bertacco Proceedings of the 2005 IEEE/ACM International conference on Computer-aided …, 2005 | 27 | 2005 |
Parallel logic simulation: Myth or reality? K Chang, C Browy Computer 45 (4), 67-73, 2012 | 25 | 2012 |
Automatic error diagnosis and correction for RTL designs KH Chang, I Wagner, I Markov, V Bertacco US Patent 8,365,110, 2013 | 19 | 2013 |
Logic synthesis and circuit customization using extensive external don't-cares KH Chang, V Bertacco, IL Markov, A Mishchenko ACM Transactions on Design Automation of Electronic Systems (TODAES) 15 (3), 26, 2010 | 19 | 2010 |
Accurately handle don't-care conditions in high-level designs and application for reducing initialized registers HZ Chou, KH Chang, SY Kuo IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 19 | 2010 |
Safe delay optimization for physical synthesis K Chang, IL Markov, V Bertacco Proceedings of the 2007 Asia and South Pacific Design Automation Conference …, 2007 | 17 | 2007 |
Postplacement rewiring by exhaustive search for functional symmetries KH Chang, IL Markov, V Bertacco ACM Transactions on Design Automation of Electronic Systems (TODAES) 12 (3), 32, 2007 | 13 | 2007 |
InVerS: an incremental verification system with circuit similarity metrics and error visualization K Chang, DA Papa, IL Markov, V Bertacco 8th International Symposium on Quality Electronic Design (ISQED'07), 487-494, 2007 | 13 | 2007 |
A simulation-based temporal assertion checker for psl KH Chang, WT Tu, YJ Yeh, SY Kuo Proceedings of IEEE International Symposium on Micro-NanoMechatronics and …, 2003 | 13 | 2003 |
Finding reset nondeterminism in RTL designs: scalable X-analysis methodology and case study HZ Chou, H Yu, KH Chang, D Dobbyn, SY Kuo Proceedings of the Conference on Design, Automation and Test in Europe, 1494 …, 2010 | 12 | 2010 |
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers HZ Chou, KH Chang, SY Kuo Proceedings of the 46th Annual Design Automation Conference, 412-415, 2009 | 11 | 2009 |
System and method for correcting gate-level simulation accuracy when unknowns exist KH Chang, YT Liu, CS Browy, C Huang US Patent 8,402,405, 2013 | 10 | 2013 |
Functional Design Errors in Digital Circuits: Diagnosis Correction and Repair K Chang, IL Markov, V Bertacco Springer Science & Business Media, 2008 | 10 | 2008 |