Aritra Hazra
Aritra Hazra
Assistant Professor, Department of Computer Science and Engineering, IIT Kharagpur
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Cited by
XFC: A framework for exploitable fault characterization in block ciphers
P Khanna, C Rebeiro, A Hazra
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
Formal verification of architectural power intent
A Hazra, S Goyal, P Dasgupta, A Pal
IEEE transactions on very large scale integration (VLSI) systems 21 (1), 78-91, 2012
Formal verification for security in IoT devices
K Keerthi, I Roy, A Hazra, C Rebeiro
Security and Fault Tolerance in Internet of Things, 179-200, 2019
Leveraging UPF-extracted assertions for modeling and formal verification of architectural power intent
A Hazra, S Mitra, P Dasgupta, A Pal, D Bagchi, K Guha
Proceedings of the 47th Design Automation Conference, 773-776, 2010
PUF-G: A CAD framework for automated assessment of provable learnability from formal PUF representations
D Chatterjee, D Mukhopadhyay, A Hazra
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
SAFARI: Automatic synthesis of fault-attack resistant block cipher implementations
I Roy, C Rebeiro, A Hazra, S Bhunia
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
Interpose PUF can be PAC Learned
D Chatterjee, D Mukhopadhyay, A Hazra
Cryptology ePrint Archive, 2020
SOLOMON: An automated framework for detecting fault attack vulnerabilities in hardware
M Srivastava, P Slpsk, I Roy, C Rebeiro, A Hazra, S Bhunia
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 310-313, 2020
POWER-TRUCTOR: An integrated tool flow for formal verification and coverage of architectural power intent
A Hazra, R Mukherjee, P Dasgupta, A Pal, KM Harer, A Banerjee, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
Formal verification of power management logic with mixed-signal domains
S Mandal, AB Da Costa, A Hazra, P Dasgupta, B Naware, RM Chunduri, ...
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
Cohesive coverage management for simulation and formal property verification
A Hazra, A Banerjee, S Mitra, P Dasgupta, PP Chakrabarti, CR Mohan
2008 IEEE Computer Society Annual Symposium on VLSI, 251-256, 2008
Physically related functions: Exploiting related inputs of PUFs for authenticated-key exchange
D Chatterjee, H Boyapally, S Patranabis, U Chatterjee, A Hazra, ...
IEEE Transactions on Information Forensics and Security 17, 3847-3862, 2022
SACReD: An attack framework on SAC resistant delay-PUFs leveraging bias and reliability factors
D Chatterjee, U Chatterjee, D Mukhopadhyay, A Hazra
2021 58th ACM/IEEE Design Automation Conference (DAC), 85-90, 2021
Formal methods for early analysis of functional reliability in component-based embedded applications
A Hazra, P Ghosh, SG Vadlamudi, PP Chakrabarti, P Dasgupta
IEEE Embedded systems letters 5 (1), 8-11, 2013
FEDS: Comprehensive fault attack exploitability detection for software implementations of block ciphers
K Keerthi, I Roy, C Rebeiro, A Hazra, S Bhunia
IACR Transactions on Cryptographic Hardware and Embedded Systems, 272-299, 2020
Synthesis of sampling modes for adaptive control
R Raha, A Hazra, A Mondal, S Dey, PP Chakrabarti, P Dasgupta
2014 IEEE International Conference on Control System, Computing and …, 2014
Reliability guarantees in automata-based scheduling for embedded control software
A Hazra, P Dasgupta
IEEE Embedded Systems Letters 5 (2), 17-20, 2013
Formal assessment of reliability specifications in embedded cyber-physical systems
A Hazra, P Dasgupta, PP Chakrabarti
Journal of Applied Logic 18, 71-104, 2016
Covert: A coverage reporting tool for analog mixed-signal designs
S Sanyal, A Hazra, P Dasgupta, S Morrison, S Surendran, ...
2020 33rd International Conference on VLSI Design and 2020 19th …, 2020
Formal methods for coverage analysis of architectural power states in power-managed designs
A Hazra, P Dasgupta, A Banerjee, K Harer
17th Asia and South Pacific Design Automation Conference, 585-590, 2012
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