| Dynamically specialized datapaths for energy efficient computing V Govindaraju, CH Ho, K Sankaralingam 2011 IEEE 17th International Symposium on High Performance Computer …, 2011 | 335 | 2011 |
| Dyser: Unifying functionality and parallelism specialization for energy-efficient computing V Govindaraju, CH Ho, T Nowatzki, J Chhugani, N Satish, ... IEEE Micro 32 (5), 38-51, 2012 | 309 | 2012 |
| Amazon Redshift re-invented N Armenatzoglou, S Basu, N Bhanoori, M Cai, N Chainani, K Chinta, ... Proceedings of the 2022 International Conference on Management of Data, 2205 …, 2022 | 75 | 2022 |
| Sampling+ dmr: practical and low-overhead permanent fault detection S Nomura, MD Sinclair, CH Ho, V Govindaraju, M De Kruijf, ... ACM SIGARCH Computer Architecture News 39 (3), 201-212, 2011 | 74 | 2011 |
| Design, integration and implementation of the DySER hardware accelerator into OpenSPARC J Benson, R Cofell, C Frericks, CH Ho, V Govindaraju, T Nowatzki, ... IEEE International Symposium on High-Performance Comp Architecture, 1-12, 2012 | 72 | 2012 |
| Toward a multicore architecture for real-time ray-tracing V Govindaraju, P Djeu, K Sankaralingam, M Vernon, WR Mark 2008 41st IEEE/ACM International Symposium on Microarchitecture, 176-187, 2008 | 70 | 2008 |
| A many-core architecture for in-memory data processing SR Agrawal, S Idicula, A Raghavan, E Vlachos, V Govindaraju, ... Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017 | 62 | 2017 |
| Hybrid instrumentation framework for multicore low power processors S Idicula, K Kashyap, A Raghavan, E Vlachos, V Govindaraju US Patent 10,503,626, 2019 | 41 | 2019 |
| Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG V Govindaraju, T Nowatzki, K Sankaralingam Proceedings of the 22nd international conference on Parallel architectures …, 2013 | 35 | 2013 |
| A graph-based program representation for analyzing hardware specialization approaches T Nowatzki, V Govindaraju, K Sankaralingam IEEE Computer Architecture Letters 14 (2), 94-98, 2015 | 18 | 2015 |
| Breaking simd shackles: Liberating accelerators by exposing flexible microarchitectural mechanisms V Govindaraju, T Nowatzki, K Sankaralingam Proceedings of the 22nd International Conference on Parallel Architectures …, 2013 | 8 | 2013 |
| Energy efficient computing through compiler assisted dynamic specialization V Govindaraju The University of Wisconsin-Madison, 2014 | 5 | 2014 |
| Big data processing: Scalability with extreme single-node performance V Govindaraju, S Idicula, S Agrawal, V Vardarajan, A Raghavan, J Wen, ... 2017 IEEE International Congress on Big Data (BigData Congress), 129-136, 2017 | 4 | 2017 |
| Tail-based top-N query evaluation G Zhang, V Govindaraju, S Idicula US Patent 10,394,811, 2019 | 3 | 2019 |
| Studying hybrid von-neumann/dataflow execution models T Nowatzki, V Govindaraju, K Sankaralingam | 2 | 2015 |
| Prototyping the DySER specialization architecture with OpenSPARC J Benson, R Cofell, C Frericks, V Govindaraju, CH Ho, Z Marzec, ... 2012 IEEE Hot Chips 24 Symposium (HCS), 1-3, 2012 | 2 | 2012 |
| Mechanisms for Parallelism Specialization for the DySER Architecture V Govindaraju, CH Ho, T Nowatzki, K Sankaralingam UW-Madison, Tech. Rep. TR-1773, 2012 | 2 | 2012 |
| Sharing compiled code for executing queries across query engines I Pandis, N Chainani, KK Chinta, V Govindaraju, AE Caldwell, ... US Patent 11,853,301, 2023 | 1 | 2023 |
| Tail-based top-N query evaluation G Zhang, V Govindaraju, S Idicula US Patent 11,194,801, 2021 | 1 | 2021 |
| Hybrid instrumentation framework for multicore low power processors S Idicula, K Kashyap, A Raghavan, E Vlachos, V Govindaraju US Patent 11,030,073, 2021 | 1 | 2021 |
