Ali Mustafa Zaidi
Ali Mustafa Zaidi
PhD Student, University of Cambridge
Verified email at arm.com
Title
Cited by
Cited by
Year
End-to-end verification of processors with ISA-Formal
A Reid, R Chen, A Deligiannis, D Gilday, D Hoyes, W Keen, A Pathirane, ...
International Conference on Computer Aided Verification, 42-58, 2016
542016
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
SM Sait, MI Ali, AM Zaidi
2005 IEEE International Symposium on Circuits and Systems, 6226-6229, 2005
132005
Evaluating parallel simulated evolution strategies for vlsi cell placement
SM Sait, MI Ali, AM Zaidi
Journal of Mathematical Modelling and Algorithms 6 (3), 433-454, 2007
52007
A new dataflow compiler ir for accelerating control-intensive code in spatial hardware
AM Zaidi, D Greaves
2014 IEEE International Parallel & Distributed Processing Symposium …, 2014
42014
Asynchronous MMC based parallel SA schemes for multiobjective standard cell placement
SM Sait, AM Zaidi, MI Ali
2006 IEEE International Symposium on Circuits and Systems, 4 pp.-4618, 2006
42006
Value state flow graph: A dataflow compiler ir for accelerating control-intensive code in spatial hardware
AM Zaidi, D Greaves
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 9 (2), 1-22, 2015
32015
Accelerating control-flow intensive code in spatial hardware
SAM Zaidi
University of Cambridge, 2015
32015
Exploring Asynchronous MMC-Based Parallel SA Schemes for Multiobjective Cell Placement on a Cluster of Workstations
SM Sait, AM Zaidi, MI Ali, KS Khan, S Syed
Arabian Journal for Science and Engineering 36 (2), 259-278, 2011
22011
Comparative evaluation of parallelization strategies for evolutionary and stochastic heuristics
SM Sait, S Sanaullah, AM Zaidi, MI Ali
Proceedings of the 7th annual conference on Genetic and evolutionary …, 2005
22005
Achieving superscalar performance without superscalar overheads-a dataflow compiler IR for custom computing
AM Zaidi, DJ Greaves
2013 Imperial College Computing Student Workshop, 2013
12013
A Modular Reconfigurable Architecture for Asymmetric and Symmetric-key Cryptography
AM Zaidi
ProQuest, 2007
12007
Fine-grained Energy/Power Instrumentation for Software-level Efficiency Optimization
DJ Greaves, M Puzovic, AM Zaidi, K McDonald-Maier, A Hopkins
2015
Exposing ILP in custom hardware with a dataflow compiler IR
AM Zaidi
Proceedings of the 22nd international conference on Parallel architectures …, 2013
2013
2013 Imperial College Computing Student Workshop
AV Jones, N Ng, T Hoare, P Norvig, T Apostolopoulos, ...
2013
A Modular Reconfigurable Architecture for Asymmetric and Symmetric-key Cryptographic Algorithms
AM Zaidi
King Fahd University of Petroleum and Minerals, 2007
2007
Acceleration of Compute-intensive Applications Using Compute Unified Device Architecture (CUDA)
A Zaidi
Department of Computing, Imperial College London 2007., 2007
2007
Wormhole RTR FPGA With Distributed Configuration Decompression
MI Ali, AM Zaidi
KING FAHAD UNIVERSITY OF PETROLEUM AND MINERALS, 2005
2005
Assessment of Parallelization Strategies of Metaheuristics for Linear Speed-up while Maintaining Quality
MI Ali, AM Zaidi
ACCELERATING MULTIOBJECTIVE VLSI CELL PLACEMENT WITH PARALLEL EVOLUTIONARY/TABU SEARCH HEURISTICS
SM Sait, MR Minhas, MI Ali, AM Zaidi
WORMHOLE RTR FPGA WITH DISTRIBUTED CONFIGURATION DECOMPRESSION
D ELRABAA, MI ALI, ALIM ZAIDI
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