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Priyajit Mukherjee
Priyajit Mukherjee
Research Scholar in the Department, E&ECE, IIT KHARAGPUR.
Verified email at iitkgp.ac.in
Title
Cited by
Cited by
Year
Design and evaluation of ZMesh topology for on-chip interconnection networks
N Prasad, P Mukherjee, S Chattopadhyay, I Chakrabarti
Journal of Parallel and Distributed Computing 113, 17-36, 2018
362018
Thermal-aware Application Mapping Strategy for Network-on-Chip based System Design
K Manna, P Mukherjee, S Chattopadhyay, I Sengupta
IEEE Transactions on Computers, 2017
332017
Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform
N Chatterjee, S Paul, P Mukherjee, S Chattopadhyay
Journal of Systems Architecture 74, 61-77, 2017
332017
Reliability-aware application mapping onto mesh based Network-on-Chip
N Chatterjee, P Mukherjee, S Chattopadhyay
Integration 62, 92-113, 2018
222018
Design of an NoC with on-chip photonic interconnects using adaptive CDMA links
S Poddar, P Ghosal, P Mukherjee, S Samui, H Rahaman
SOC Conference (SOCC), 2012 IEEE International, 352-357, 2012
112012
Low Power Low Latency Floorplan‐aware Path Synthesis in Application-Specific Network-on-Chip Design
P Mukherjee, S Chattopadhyay
Integration, the VLSI Journal 58, 167-188, 2017
72017
A strategy for fault tolerant reconfigurable Network-on-Chip design
N Chatterjee, P Mukherjee, S Chattopadhyay
VLSI Design and Test (VDAT), 2016 20th International Symposium on, 1-2, 2016
52016
Area Constrained Performance Optimized ASNoC Synthesis with Thermal‐aware White Space Allocation and Redistribution
P Mukherjee, S D'souza, S Chattopadhyay
Integration, the VLSI Journal 60, 167-189, 2018
42018
Thermal-aware detour routing in 3D NoCs
P Mukherjee, N Chatterjee, S Chattopadhyay
Journal of Parallel and Distributed Computing, 2020
32020
Thermal-aware task allocation and scheduling for periodic real-time applications in mesh-based heterogeneous NoCs
P Mukherjee, K Jain, S Chattopadhyay
Real-Time Systems, 1-36, 2019
22019
An Area and Power Efficient Dynamic TDMA Based Photonic Network on Chip
S Poddar, P Ghosal, P Mukherjee, S Samui, H Rahaman
Electronic System Design (ISED), 2013 International Symposium on, 113-117, 2013
12013
A Photonic Network on Chip with CDMA Links
S Poddar, P Ghosal, P Mukherjee, S Samui, H Rahaman
16th International Symposium, VDAT 2012 7373, 377-378, 2012
12012
An ILP-based floorplan-aware path synthesis technique for Application-Specific NoC design
P Mukherjee, S Chattopadhyay
Recent Advances in Information Technology (RAIT), 2016 3rd International …, 2016
2016
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Articles 1–13