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Yuzhe Ma
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Recent advances in convolutional neural network acceleration
Q Zhang, M Zhang, T Chen, Z Sun, Y Ma, B Yu
Neurocomputing 323, 37-51, 2019
3202019
Layout hotspot detection with feature tensor generation and deep biased learning
H Yang, J Su, Y Zou, B Yu, EFY Young
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
1272017
GAN-OPC: Mask optimization with lithography-guided generative adversarial nets
H Yang, S Li, Y Ma, B Yu, EFY Young
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
1232018
Machine learning for electronic design automation: A survey
G Huang, J Hu, Y He, J Liu, M Ma, Z Shen, J Wu, Y Xu, H Zhang, K Zhong, ...
ACM Transactions on Design Automation of Electronic Systems (TODAES) 26 (5 …, 2021
1162021
High performance graph convolutional networks with applications in testability analysis
Y Ma, H Ren, B Khailany, H Sikka, L Luo, K Natarajan, B Yu
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
972019
Clock-aware ultrascale FPGA placement with machine learning routability prediction
CW Pui, G Chen, Y Ma, EFY Young, B Yu
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 929-936, 2017
542017
SRAF insertion via supervised dictionary learning
H Geng, H Yang, Y Ma, J Mitra, B Yu
Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019
322019
DAMO: Deep agile mask optimization for full chip scale
G Chen, W Chen, Y Ma, H Yang, B Yu
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
282020
Cross-layer optimization for high speed adders: A pareto driven machine learning approach
Y Ma, S Roy, J Miao, J Chen, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
272018
A unified framework for simultaneous layout decomposition and mask optimization
Y Ma, W Zhong, S Hu, JR Gao, J Kuang, J Miao, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
262020
Adversarial perturbation attacks on ML-based CAD: A case study on CNN-based lithographic hotspot detection
K Liu, H Yang, Y Ma, B Tan, B Yu, EFY Young, R Karri, S Garg
ACM Transactions on Design Automation of Electronic Systems (TODAES) 25 (5 …, 2020
252020
Understanding graphs in EDA: From shallow to deep learning
Y Ma, Z He, W Li, L Zhang, B Yu
Proceedings of the 2020 International Symposium on Physical Design, 119-126, 2020
242020
Neural-ILT: Migrating ILT to neural networks for mask printability and complexity co-optimization
B Jiang, L Liu, Y Ma, H Zhang, B Yu, EFY Young
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
202020
VLSI mask optimization: From shallow to deep learning
H Yang, W Zhong, Y Ma, H Geng, R Chen, W Chen, B Yu
Integration 77, 96-103, 2021
172021
SD-PUF: Spliced digital physical unclonable function
J Miao, M Li, S Roy, Y Ma, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
172017
A Unified Approximation Framework for Compressing and Accelerating Deep Neural Networks
Y Ma, R Chen, W Li, F Shang, W Yu, M Cho, B Yu
arXiv preprint arXiv:1807.10119, 2018
162018
BOOM-Explorer: RISC-V BOOM microarchitecture design space exploration framework
C Bai, Q Sun, J Zhai, Y Ma, B Yu, MDF Wong
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021
152021
A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance adders
S Roy, Y Ma, J Miao, B Yu
2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017
152017
DevelSet: Deep neural level set for instant mask optimization
G Chen, Z Yu, H Liu, Y Ma, B Yu
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021
142021
High-speed adder design space exploration via graph neural processes
H Geng, Y Ma, Q Xu, J Miao, S Roy, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
142021
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