Dimitris Kaseridis
TitleCited byYear
Minimalist open-page: A DRAM page-mode scheduling policy for the many-core era
D Kaseridis, J Stuecheli, LK John
2011 44th Annual IEEE/ACM International Symposium on Microarchitecture …, 2011
1442011
The virtual write queue: Coordinating DRAM and last-level cache policies
J Stuecheli, D Kaseridis, D Daly, HC Hunter, LK John
ACM SIGARCH Computer Architecture News 38 (3), 72-82, 2010
1312010
Elastic refresh: Techniques to mitigate refresh penalties in high density memory
J Stuecheli, D Kaseridis, H C Hunter, LK John
Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on …, 2010
1192010
Modeling program resource demand using inherent program characteristics
J Chen, LK John, D Kaseridis
Proceedings of the ACM SIGMETRICS joint international conference on …, 2011
492011
System-level Max Power (SYMPO)-A systematic approach for escalating system-level power consumption using synthetic benchmarks
K Ganesan, J Jo, WL Bircher, D Kaseridis, Z Yu, LK John
2010 19th International Conference on Parallel Architectures and Compilation …, 2010
432010
Bank-aware dynamic cache partitioning for multicore architectures
D Kaseridis, J Stuecheli, LK John
2009 International Conference on Parallel Processing, 18-25, 2009
412009
A bandwidth-aware memory-subsystem resource management using non-invasive resource profilers for large cmp systems
D Kaseridis, J Stuecheli, J Chen, LK John
HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010
392010
Reseeding-based test set embedding with reduced test sequences
E Kalligeros, D Kaseridis, X Kavousianos, D Nikolos
Sixth international symposium on quality electronic design (isqed'05), 226-231, 2005
242005
Cache friendliness-aware managementof shared last-level caches for highperformance multi-core systems
D Kaseridis, MF Iqbal, LK John
IEEE transactions on computers 63 (4), 874-887, 2013
222013
An efficient test set embedding scheme with reduced test data storage and test sequence length requirements for scan-based testing
D Kaseridis, E Kalligeros, X Kavousianos, D Nikolos
Inf. Pap. Dig. IEEE ETS, 147-150, 2005
102005
Coordinating DRAM and last-level-cache policies with the virtual write queue
J Stuecheli, D Kaseridis, D Daly, H Hunter, L John
IEEE micro 31 (1), 90-98, 2010
82010
MCFQ: Leveraging Memory-level Parallelism and Application's Cache Friendliness for Efficient Management of Quasi-partitioned Last-level Caches
D Kaseridis, MF Iqbal, J Stuecheli, LK John
2011 International Conference on Parallel Architectures and Compilation …, 2011
42011
CMP/CMT Scaling of SPECjbb2005 on UltraSPARC T1
D Kaseridis, LK John
Workshop on Computer Architecture Evaluation using Commercial Workloads, 2007
32007
Performance Analysis of Multiple Threads/Cores Using the UltraSPARC T1
D Kaseridis, LK John
Workshop on Unique Chips and Systems (UCAS-4), 2008
2008
KEYNOTE Session I (Joint HPCA/PPoP)
P Bose, MU Farooq, L Chen, LK John, T Li, P Brett, R Knauerhase, ...
A Machine Learning Based Search Approach to Synthesize System-level Power Viruses
K Ganesan, J Jo, WL Bircher, D Kaseridis, Z Yu, LK John
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Articles 1–16