Follow
Scott Little
Scott Little
Engineer, Intel
Verified email at intel.com
Title
Cited by
Cited by
Year
Verification of analog/mixed-signal circuits using symbolic methods
D Walter, S Little, C Myers, N Seegmiller, T Yoneda
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
672008
Analog MAP decoder for (8, 4) Hamming code in subthreshold CMOS
C Winstead, J Dai, WJ Kim, S Little
Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001, 132-147, 2001
652001
Verification of analog/mixed-signal circuits using labeled hybrid petri nets
S Little, N Seegmiller, D Walter, C Myers, T Yoneda
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006
552006
Verification of analog and mixed-signal circuits using timed hybrid petri nets
S Little, D Walter, N Seegmiller, C Myers, T Yoneda
International Symposium on Automated Technology for Verification and …, 2004
412004
Analog/mixed-signal circuit verification using models generated from simulation traces
S Little, D Walter, K Jones, C Myers
Automated Technology for Verification and Analysis: 5th International …, 2007
402007
Verification of analog/mixed-signal circuits using labeled hybrid petri nets
S Little, D Walter, C Myers, R Thacker, S Batchu, T Yoneda
IEEE Transactions on computer-aided design of integrated circuits and …, 2011
362011
Analog/mixed-signal circuit verification using models generated from simulation traces
S Little, D Walter, K Jones, C Myers, A Sen
International Journal of Foundations of Computer Science 21 (02), 191-210, 2010
332010
Realtime regular expressions for analog and mixed-signal assertions
J Havlicek, S Little
2011 Formal Methods in Computer-Aided Design (FMCAD), 155-162, 2011
282011
Bounded model checking of analog and mixed-signal circuits using an SMT solver
D Walter, S Little, C Myers
Automated Technology for Verification and Analysis: 5th International …, 2007
282007
The case for analog circuit verification
CJ Myers, RR Harrison, D Walter, N Seegmiller, S Little
Electronic notes in theoretical computer science 153 (3), 53-63, 2006
252006
Efficient Modeling and Verification of Analog/Mixed Signal Circuits Using Labeled Hybrid Petri nets.
S Little
School of Computing, University of Utah, 2008
232008
Verification of timed circuits with failure-directed abstractions
H Zheng, CJ Myers, D Walter, S Little, T Yoneda
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
202006
Symbolic model checking of analog/mixed-signal circuits
D Walter, S Little, N Seegmiller, CJ Myers, T Yoneda
2007 Asia and South Pacific Design Automation Conference, 316-323, 2007
182007
Synchronizing AMS assertions with AMS simulation: From theory to practice
S Mukherjee, P Dasgupta, S Mukhopadhyay, S Little, J Havlicek, ...
ACM Transactions on Design Automation of Electronic Systems (TODAES) 17 (4 …, 2012
142012
A new verification method for embedded systems
RA Thacker, CJ Myers, K Jones, SR Little
2009 IEEE International Conference on Computer Design, 193-200, 2009
142009
Verification of design derived from power intent
X Feng, J Bhadra, SR Little
US Patent 9,002,694, 2015
102015
Abstract modeling and simulation aided verification of analog/mixed-signal circuits
S Little, C Myers
Workshop on Formal Verification for Analog Circuits (FAC’08), Princeton, NJ, 2008
82008
Bringing continous domain into SystemVerilog covergroups
PK Bhattacharya, S Chakraborti, S Little, D O’Riordan, V Bhutani
Design and Verification Conference, 1-8, 2012
72012
LEMA: A tool for the formal verification of digitally-intensive analog/mixed-signal circuits
AN Fisher, S Batchu, K Jones, D Kulkarni, S Little, D Walter, CJ Myers
2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014
62014
Property-based monitoring of analog and mixed-signal systems
J Havlicek, S Little, O Maler, D Nickovic
Formal Modeling and Analysis of Timed Systems: 8th International Conference …, 2010
52010
The system can't perform the operation now. Try again later.
Articles 1–20