Mingyu Chen (陈明宇)
Cited by
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A software memory partition approach for eliminating bank-level interference in multicore systems
L Liu, Z Cui, M Xing, Y Bao, M Chen, C Wu
Proceedings of the 21st international conference on Parallel architectures …, 2012
SMAT: An input adaptive auto-tuner for sparse matrix-vector multiplication
J Li, G Tan, M Chen, N Sun
Proceedings of the 34th ACM SIGPLAN conference on Programming language …, 2013
Moby: A mobile benchmark suite for architectural simulators
Y Huang, Z Zha, M Chen, L Zhang
2014 IEEE International Symposium on Performance Analysis of Systems and …, 2014
HMTT: a platform independent full-system memory trace monitoring system
Y Bao, M Chen, Y Ruan, L Liu, J Fan, Q Yuan, B Song, J Xu
Proceedings of the 2008 ACM SIGMETRICS international conference on …, 2008
Understanding the GPU microarchitecture to achieve bare-metal performance tuning
X Zhang, G Tan, S Xue, J Li, K Zhou, M Chen
Proceedings of the 22nd ACM SIGPLAN Symposium on Principles and Practice of …, 2017
Exploiting program semantics to place data in hybrid memory
W Wei, D Jiang, SA McKee, J Xiong, M Chen
2015 International Conference on Parallel Architecture and Compilation (PACT …, 2015
CMD: Classification-based memory deduplication through page access characteristics
L Chen, Z Wei, Z Cui, M Chen, H Pan, Y Bao
ACM SIGPLAN Notices 49 (7), 65-76, 2014
DMA cache: Using on-chip storage to architecturally separate I/O data from CPU data for improving I/O performance
D Tang, Y Bao, W Hu, M Chen
HPCA-16 2010 The Sixteenth International Symposium on High-Performance …, 2010
Going vertical in memory management: Handling multiplicity by multi-policy
L Liu, Y Li, Z Cui, Y Bao, M Chen, C Wu
Acm Sigarch Computer Architecture News 42 (3), 169-180, 2014
Extending Amdahl's law in the multicore era
E Yao, Y Bao, G Tan, M Chen
ACM SIGMETRICS Performance Evaluation Review 37 (2), 24-26, 2009
Message-based memory access apparatus and access method thereof
M Chen, Y Ruan, Z Cui, L Chen, Y Huang, M Chen
US Patent 9,870,327, 2018
DTail: a flexible approach to DRAM refresh management
Z Cui, SA McKee, Z Zha, Y Bao, M Chen
Proceedings of the 28th ACM international conference on Supercomputing, 43-52, 2014
Grid and P 2 P trust model based on recommendation evidence reasoning.
J Zhu, S Yang, J Fan, M Chen
Jisuanji Yanjiu yu Fazhan(Comput. Res. Dev.) 42 (5), 797-803, 2005
DWC: Dynamic write consolidation for phase change memory systems
F Xia, D Jiang, J Xiong, M Chen, L Zhang, N Sun
Proceedings of the 28th ACM international conference on Supercomputing, 211-220, 2014
Pipelined compaction for the LSM-tree
Z Zhang, Y Yue, B He, J Xiong, M Chen, L Zhang, N Sun
2014 IEEE 28th International Parallel and Distributed Processing Symposium …, 2014
HAP: Hybrid-memory-aware partition in shared last-level cache
W Wei, D Jiang, J Xiong, M Chen
ACM Transactions on Architecture and Code Optimization (TACO) 14 (3), 1-25, 2017
P-GAS: Parallelizing a cycle-accurate event-driven many-core processor simulator using parallel discrete event simulation
H Lv, Y Cheng, L Bai, M Chen, D Fan, N Sun
2010 IEEE Workshop on Principles of Advanced and Distributed Simulation, 1-8, 2010
Dynamic Self-organized computer Architecture based on Grid-component (DSAG)
J Fan, M Chen
Journal of Computer Research and Development 40 (12), 1737-1742, 2003
Computer organization and design course with FPGA cloud
K Zhang, Y Chang, M Chen, Y Bao, Z Xu
Proceedings of the 50th ACM Technical Symposium on Computer Science …, 2019
HaLock: Hardware-assisted lock contention detection in multithreaded applications
Y Huang, Z Cui, L Chen, W Zhang, Y Bao, M Chen
Proceedings of the 21st international conference on Parallel architectures …, 2012
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