| Methodology for efficient CNN architectures in profiling attacks G Zaid, L Bossuet, A Habrard, A Venelli IACR Transactions on Cryptographic Hardware and Embedded Systems, 1-36, 2020 | 188 | 2020 |
| Contactless electromagnetic active attack on ring oscillator based true random number generator P Bayon, L Bossuet, A Aubert, V Fischer, F Poucheret, B Robisson, ... Constructive Side-Channel Analysis and Secure Design: Third International …, 2012 | 170 | 2012 |
| A PUF based on a transient effect ring oscillator and insensitive to locking phenomenon L Bossuet, XT Ngo, Z Cherif, V Fischer IEEE Transactions on Emerging Topics in Computing 2 (1), 30-36, 2013 | 156 | 2013 |
| Implementation and characterization of a physical unclonable function for IoT: a case study with the TERO-PUF C Marchand, L Bossuet, U Mureddu, N Bochard, A Cherkaoui, V Fischer IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 127 | 2017 |
| Dynamically configurable security for SRAM FPGA bitstreams L Bossuet, G Gogniat, W Burleson International Journal of Embedded Systems 2 (1-2), 73-85, 2006 | 120 | 2006 |
| Reconfigurable hardware for high-security/high-performance embedded systems: The SAFES perspective G Gogniat, T Wolf, W Burleson, JP Diguet, L Bossuet, R Vaslin IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (2), 144-155, 2008 | 110 | 2008 |
| A survey of AIS-20/31 compliant TRNG cores suitable for FPGA devices O Petura, U Mureddu, N Bochard, V Fischer, L Bossuet 2016 26th international conference on field programmable logic and …, 2016 | 92 | 2016 |
| Architectures of flexible symmetric key crypto engines—a survey: From hardware coprocessor to multi-crypto-processor system on chip L Bossuet, M Grand, L Gaspar, V Fischer, G Gogniat ACM Computing Surveys (CSUR) 45 (4), 1-32, 2013 | 90 | 2013 |
| An easy-to-design PUF based on a single oscillator: The loop PUF Z Cherif, JL Danger, S Guilley, L Bossuet 2012 15th Euromicro Conference on Digital System Design, 156-162, 2012 | 89 | 2012 |
| Correlated power noise generator as a low cost DPA countermeasures to secure hardware AES cipher N Kamoun, L Bossuet, A Ghazel 2009 3rd International Conference on Signals, Circuits and Systems (SCS), 1-6, 2009 | 82* | 2009 |
| Survey of hardware protection of design data for integrated circuits and intellectual properties B Colombier, L Bossuet IET Computers & Digital Techniques 8 (6), 274-287, 2014 | 76 | 2014 |
| Design space pruning through early estimations of area/delay tradeoffs for FPGA implementations S Bilavarn, G Gogniat, JL Philippe, L Bossuet IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 66 | 2006 |
| Design, evaluation, and optimization of physical unclonable functions based on transient effect ring oscillators A Cherkaoui, L Bossuet, C Marchand IEEE Transactions on Information Forensics and Security 11 (6), 1291-1305, 2016 | 64 | 2016 |
| Gossip noc--avoiding timing side-channel attacks through traffic management C Reinbrecht, A Susin, L Bossuet, J Sepúlveda 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 601-606, 2016 | 62 | 2016 |
| Automatic low-cost IP watermarking technique based on output mark insertions B Le Gal, L Bossuet Design Automation for Embedded Systems 16, 71-92, 2012 | 61 | 2012 |
| Ranking loss: Maximizing the success rate in deep learning side-channel analysis G Zaid, L Bossuet, F Dassance, A Habrard, A Venelli IACR Transactions on Cryptographic Hardware and Embedded Systems, 25-55, 2021 | 50 | 2021 |
| New paradigms for access control in constrained environments A Cherkaoui, L Bossuet, L Seitz, G Selander, R Borgaonkar 2014 9th International Symposium on Reconfigurable and Communication-Centric …, 2014 | 50 | 2014 |
| The Security of ARM TrustZone in a FPGA-based SoC EM Benhani, L Bossuet, A Aubert IEEE Transactions on Computers 68 (8), 1238-1248, 2019 | 48 | 2019 |
| Side channel attack on NoC-based MPSoCs are practical: NoC Prime+ Probe attack C Reinbrecht, A Susin, L Bossuet, G Sigl, J Sepúlveda 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016 | 45 | 2016 |
| Generic design space exploration for reconfigurable architectures L Bossuet, G Gogniat, JL Philippe 19th IEEE International Parallel and Distributed Processing Symposium, 4 pp., 2005 | 41 | 2005 |
Viktor FischerProfessor at Jean Monnet University Saint-EtienneVerified email at univ-st-etienne.fr
