Aarti Gupta
Cited by
Cited by
F-Soft: Software verification platform
F Ivančić, Z Yang, M Ganai, A Gupta, I Shlyakhter, P Ashar
Computer Aided Verification, 167-170, 2005
A survey of recent advances in SAT-based formal verification
MR Prasad, A Biere, A Gupta
International Journal on Software Tools for Technology Transfer 7, 156-173, 2005
Formal hardware verification methods: A survey
A Gupta
Formal Methods in System Design 1, 151-238, 1992
A general approach to network configuration verification
R Beckett, A Gupta, R Mahajan, D Walker
Proceedings of the Conference of the ACM Special Interest Group on Data …, 2017
Probabilistic temporal logic falsification of cyber-physical systems
H Abbas, G Fainekos, S Sankaranarayanan, F Ivančić, A Gupta
ACM Transactions on Embedded Computing Systems (TECS) 12 (2s), 1-30, 2013
Reasoning about threads communicating via locks
V Kahlon, F Ivančić, A Gupta
Computer Aided Verification, 267-274, 2005
Monte-carlo techniques for falsification of temporal properties of non-linear hybrid systems
T Nghiem, S Sankaranarayanan, G Fainekos, F Ivancić, A Gupta, ...
Proceedings of the 13th ACM international conference on Hybrid systems …, 2010
Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
MK Ganai, P Ashar, A Gupta, L Zhang, S Malik
Proceedings of the 39th annual Design Automation Conference, 747-750, 2002
Fast and accurate static data-race detection for concurrent programs
V Kahlon, Y Yang, S Sankaranarayanan, A Gupta
Computer Aided Verification, 226-239, 2007
Efficient SAT-based bounded model checking for software verification
F Ivančić, Z Yang, MK Ganai, A Gupta, P Ashar
Theoretical Computer Science 404 (3), 256-274, 2008
Iterative abstraction using SAT-based BMC with proof analysis
A Gupta, M Ganai, Z Yang, P Ashar
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003
SAT-based image computation with application in reachability analysis
A Gupta, Z Yang, P Ashar, A Gupta
Formal Methods in Computer-Aided Design, 391-408, 2000
Monotonic partial order reduction: An optimal symbolic partial order reduction technique
V Kahlon, C Wang, A Gupta
Computer Aided Verification: 21st International Conference, CAV 2009 …, 2009
Model checking C programs using F-Soft
F Ivancic, I Shlyakhter, A Gupta, MK Ganai, V Kahlon, C Wang, Z Yang
2005 International Conference on Computer Design, 297-308, 2005
Static analysis in disjunctive numerical domains
S Sankaranarayanan, F Ivančić, I Shlyakhter, A Gupta
Static Analysis, 3-17, 2006
Accelerating high-level bounded model checking
MK Ganai, A Gupta
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006
Coverage guided systematic concurrency testing
C Wang, M Said, A Gupta
Proceedings of the 33rd International Conference on Software Engineering …, 2011
Symbolic predictive analysis for concurrent programs
C Wang, S Kundu, M Ganai, A Gupta
International Symposium on Formal Methods, 256-272, 2009
Peephole partial order reduction
C Wang, Z Yang, V Kahlon, A Gupta
International Conference on Tools and Algorithms for the Construction and …, 2008
SAT-based scalable formal verification solutions
M Ganai, A Gupta
Springer Science+ Business Media, 2007
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