Hariklia Deligianni
Hariklia Deligianni
Adjunct Faculty Biomedical Engineering, Columbia University
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Cited by
Cited by
Damascene copper electroplating for chip interconnections
PC Andricacos, C Uzoh, JO Dukovic, J Horkans, H Deligianni
IBM Journal of Research and Development 42 (5), 567-574, 1998
A High Efficiency Electrodeposited Cu2ZnSnS4 Solar Cell
S Ahmed, KB Reuter, O Gunawan, L Guo, LT Romankiw, H Deligianni
Advanced Energy Materials 2 (2), 253-259, 2012
The chemistry of additives in damascene copper plating
PM Vereecken, RA Binstead, H Deligianni, PC Andricacos
IBM Journal of Research and Development 49 (1), 3-18, 2005
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs)
AW Topol, DC La Tulipe, L Shi, SM Alam, DJ Frank, SE Steen, J Vichiconti, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005
Electrodeposited Cu2ZnSnSe4 thin film solar cell with 7% power conversion efficiency
L Guo, Y Zhu, O Gunawan, T Gokmen, VR Deline, S Ahmed, ...
Progress in Photovoltaics: Research and Applications 22 (1), 58-68, 2014
Vertical nanowire FET devices
H Deligianni, Q Huang, LT Romankiw
US Patent 8,637,849, 2014
Methods of manufacture of vertical nanowire FET devices
H Deligianni, Q Huang, LT Romankiw
US Patent 7,892,956, 2011
Flip-chip interconnections using lead-free solders
PC Andricacos, M Datta, H Deligianni, WJ Horkans, SK Kang, ...
US Patent 6,224,690, 2001
In situ surface pH measurement during electrolysis using a rotating pH electrode
H Deligianni, LT Romankiw
IBM Journal of Research and Development 37 (2), 85-95, 1993
Role of oxygen vacancies in V/sub FB//V/sub t/stability of pFET metals on HfO/sub 2
E Cartier, FR McFeely, V Narayanan, P Jamison, BP Linder, M Copel, ...
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005., 230-231, 2005
Selective capping of copper wiring
PC Andricacos, ST Chen, JM Cotte, H Deligianni, M Krishnan, WT Tseng, ...
US Patent 7,008,871, 2006
Effect of fluid flow on convective transport in small cavities
RC Alkire, H Deligianni, JB Ju
Journal of the Electrochemical Society 137 (3), 818, 1990
Methods for fabricating silicon carriers with conductive through-vias with low stress and low defect density
VS Basker, JM Cotte, H Deligianni, JU Knickerbocker, KT Kwietniak
US Patent 7,863,189, 2011
The role of mass transport on anisotropic electrochemical pattern etching
R Alkire, H Deligianni
Journal of the Electrochemical Society 135 (5), 1093, 1988
Electrochemical fabrication of mechanically robust PbSn C4 interconnections
M Datta, RV Shenoy, C Jahnes, PC Andricacos, J Horkans, JO Dukovic, ...
Journal of the Electrochemical Society 142 (11), 3779, 1995
Copper alloys for chip and package interconnections
PC Andricacos, H Deligianni, JME Harper, CK Hu, DJ Pearson, ...
US Patent 6,063,506, 2000
The next frontier: electrodeposition for solar cell fabrication
H Deligianni, S Ahmed, LT Romankiw
The Electrochemical Society Interface 20 (2), 47, 2011
Deep filled vias
P Andricacos, EI Cooper, TJ Dalton, H Deligianni, D Guidotti, ...
US Patent 7,060,624, 2006
Method of making electroplated interconnection structures on integrated circuit chips
PC Andricacos, H Deligianni, JO Dukovic, DC Edelstein, WJ Horkans, ...
US Patent 6,709,562, 2004
MEMS RF switch with low actuation voltage
H Deligianni, R Groves, C Jahnes, JL Lund, P Andricacos, J Cotte, ...
US Patent 6,639,488, 2003
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