Subhasis Banerjee
Subhasis Banerjee
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Title
Cited by
Cited by
Year
Compact TCAM: Flow entry compaction in TCAM for power aware SDN
K Kannan, S Banerjee
International conference on distributed computing and networking, 439-444, 2013
1252013
Tag-in-tag: Efficient flow table management in SDN switches
S Banerjee, K Kannan
Network and Service Management (CNSM), 2014 10th International Conference on …, 2014
592014
Flowmaster: Early eviction of dead flow on SDN switches
K Kannan, S Banerjee
International Conference on Distributed Computing and Networking, 484-498, 2014
342014
Scissors: dealing with header redundancies in data centers through SDN
K Kannan, S Banerjee
2012 8th international conference on network and service management (cnsm …, 2012
242012
On the effectiveness of phase based regression models to trade power and performance using dynamic processor adaptation
S Banerjee, G Surendra, SK Nandy
Journal of Systems Architecture 54 (8), 797-815, 2008
152008
Program phase directed dynamic cache way reconfiguration for power efficiency
S Banerjee, G Surendra, SK Nandy
2007 Asia and South Pacific Design Automation Conference, 884-889, 2007
152007
A framework for performance analysis and tuning in hadoop based clusters
G Bansal, A Gupta, U Pyne, M Singhal, S Banerjee
Smarter Planet and Big Data Analytics Workshop (SPBDA 2014), held in …, 2014
142014
On the effectiveness of flow aggregation in improving instruction reuse in network processing applications
G Surendra, S Banerjee, SK Nandy
International Journal of Parallel Programming 31 (6), 469-487, 2003
52003
Enhancing speedup in network processing applications by exploiting instruction reuse with flow aggregation
G Surendra, S Banerjee, SK Nandy
Embedded Software for SoC, 359-371, 2003
52003
Accord: An analytical cache contention model using reuse distances for modern multiprocessors
R Hemani, S Banerjee, A Guha
32014
On the effectiveness of runtime resource reconfiguration exploiting program behavior in superscalar microprocessor
S Banerjee
Indian Institute of Science Bangalore, 2006
32006
Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations
G Surendra, S Banerjee, SK Nandy
Journal of Embedded Computing 2 (1), 15-34, 2006
32006
On the effectiveness of prefetching and reuse in reducing L1 data cache traffic: a case study of Snort
G Surendra, S Banerjee, SK Nandy
Proceedings of the 3rd workshop on Memory performance issues: in conjunction …, 2004
32004
Exploiting program execution phases to trade power and performance for media workload
S Banerjee, G Surendra, SK Nandy
ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE …, 2004
32004
SARROD: SPARQL Analyzer and Reordering for Runtime Optimization on Big Data
N Tripathi, S Banerjee
International Conference on Big Data Analytics, 189-196, 2014
22014
Exploiting the behavior of ready instructions for power benefits in a dynamically scheduled embedded processor
G Surendra, S Banerjee, SK Nandy
The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS'04. 2 …, 2004
22004
Power-performance trade-off using pipeline delays
G Surendra, S Banerjee, SK Nandy
ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE …, 2004
22004
On the applicability of simple cache models for modern processors
R Hemani, S Banerjee, A Guha
2016 2nd International Conference on Green High Performance Computing …, 2016
12016
On the effectiveness of dynamically allocating resources across program execution phases for media workloads
S Banerjee, G Surendra, SK Nandy
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004 …, 2004
12004
The interaction of last-level-cache mechanisms on modern processors
R Hemani, S Banerjee, A Guha
Proceedings of the International Symposium on Memory Systems, 249-250, 2017
2017
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