Saumitra Mehrotra
Saumitra Mehrotra
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Engineering Nanowire n-MOSFETs at
SR Mehrotra, SG Kim, T Kubis, M Povolotskyi, MS Lundstrom, G Klimeck
IEEE Transactions on Electron Devices 60 (7), 2171-2177, 2013
Design concepts of terahertz quantum cascade lasers: Proposal for terahertz laser efficiency improvements
T Kubis, SR Mehrotra, G Klimeck
Applied Physics Letters 97 (26), 2010
Design guidelines for sub-12 nm nanowire MOSFETs
M Salmani-Jelodar, SR Mehrotra, H Ilatikhameneh, G Klimeck
IEEE Transactions on Nanotechnology 14 (2), 210-213, 2015
Atomistic approach to alloy scattering in Si1− xGex
SR Mehrotra, A Paul, G Klimeck
Applied Physics Letters 98 (17), 2011
Simulation Study of Thin-Body Ballistic n-MOSFETs Involving Transport in Mixed-L Valleys
SR Mehrotra, M Povolotskyi, DC Elias, T Kubis, JJM Law, MJW Rodwell, ...
IEEE electron device letters 34 (9), 1196-1198, 2013
Effect of diameter variation on electrical characteristics of Schottky barrier indium arsenide nanowire field-effect transistors
A Razavieh, PK Mohseni, K Jung, S Mehrotra, S Das, S Suslov, X Li, ...
ACS nano 8 (6), 6281-6287, 2014
Performance prediction of ultrascaled SiGe/Si core/shell electron and hole nanowire MOSFETs
A Paul, S Mehrotra, M Luisier, G Klimeck
IEEE electron device letters 31 (4), 278-280, 2010
On the validity of the top of the barrier quantum transport model for ballistic nanowire MOSFETs
A Paul, S Mehrotra, G Klimeck, M Luisier
2009 13th International Workshop on Computational Electronics, 1-4, 2009
A 90nm BiCMOS technology featuring 400GHz fMAX SiGe:C HBT
VP Trivedi, JP John, J Young, T Dao, D Morgan, R Ma, D Hammock, ...
2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 60-63, 2016
Field-effect transistor and method therefor
SR Mehrotra, L Radic, B Grote
US Patent 10,522,677, 2019
Utilizing the unique properties of nanowire MOSFETs for RF applications
A Razavieh, S Mehrotra, N Singh, G Klimeck, D Janes, J Appenzeller
Nano letters 13 (4), 1549-1554, 2013
Observation of 1D behavior in Si nanowires: Toward high-performance TFETs
RB Salazar, SR Mehrotra, G Klimeck, N Singh, J Appenzeller
Nano letters 12 (11), 5571-5575, 2012
Interface trap density metrology of state-of-the-art undoped Si n-FinFETs
GC Tettamanzi, A Paul, S Lee, SR Mehrotra, N Collaert, S Biesemans, ...
IEEE Electron Device Letters 32 (4), 440-442, 2011
A Simulation Study of Silicon Nanowire Field Effect Transistors (FETs)
SR Mehrotra
University of Cincinnati, 2007
Towards ultimate scaling of LDMOS with Ultralow Specific On-resistance
S Mehrotra, L Radic, B Grote, T Saxena, G Qin, V Khemka, T Thomas, ...
2020 32nd International Symposium on Power Semiconductor Devices and ICs …, 2020
Tunneling: The major issue in ultra-scaled MOSFETs
MS Jelodar, H Ilatikhameneh, P Sarangapani, SR Mehrotra, G Klimeck, ...
2015 IEEE 15th International Conference on Nanotechnology (IEEE-NANO), 670-673, 2015
Interface trap density metrology from sub-threshold transport in highly scaled undoped Si n-FinFETs
A Paul, GC Tettamanzi, S Lee, SR Mehrotra, N Collaert, S Biesemans, ...
Journal of Applied Physics 110 (12), 2011
S Ahmed, S Mehrotra, S Kim, M Mannino, G Klimeck, D Vasileska, ...
Режим доступу до ресурсу: https://nanohub. org/resources/mosfet, 2017
Atomistic simulation of phonon and alloy limited hole mobility in Si1–xGex nanowires
S Mehrotra, P Long, M Povolotskyi, G Klimeck
physica status solidi (RRL)–Rapid Research Letters 7 (10), 903-906, 2013
Field-effect transistor and method therefor
SR Mehrotra, L Radic, B Grote
US Patent 10,424,646, 2019
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