Coupling analysis of through-silicon via (TSV) arrays in silicon interposers for 3D systems B Xie, M Swaminathan, KJ Han, J Xie 2011 IEEE International Symposium on Electromagnetic Compatibility, 16-21, 2011 | 43 | 2011 |
Electrical–thermal modeling of through‐silicon via (TSV) arrays in interposer J Xie, B Xie, M Swaminathan International Journal of Numerical Modelling: Electronic Networks, Devices …, 2013 | 19 | 2013 |
Electromagnetic modeling of non-uniform through-silicon via (TSV) interconnections B Xie, M Swaminathan 2012 IEEE 16th Workshop on Signal and Power Integrity (SPI), 43-46, 2012 | 16 | 2012 |
Substrateless double-sided embedded multi-die interconnect bridge B Xie, J Xie, S Sharan, D Mallik, RL Sankman US Patent App. 16/440,218, 2020 | 13 | 2020 |
FDFD Modeling of Signal Paths with TSVs in Silicon Interposer B Xie, M Swaminathan IEEE, 0 | 13* | |
Modeling and analysis of SSN in silicon and glass interposers for 3D systems B Xie, M Swaminathan 2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging …, 2012 | 9 | 2012 |
Modeling and analysis of SSN in silicon and glass interposers for 3D systems B Xie, M Swaminathan 2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging …, 2012 | 9 | 2012 |
System design technology co-optimization for 3D integration at< 5nm nodes SC Song, G Nallapati, I Khan, N Nikfar, B Yan, M Miranda, B Lim, ... 2021 IEEE International Electron Devices Meeting (IEDM), 22.3. 1-22.3. 4, 2021 | 8 | 2021 |
FDFD Nonconformal Domain Decomposition Method for the Electromagnetic Modeling of Interconnections in Silicon Interposer B Xie, M Swaminathan, KJ Han IEEE Transactions on Electromagnetic Compatibility 57 (3), 496-504, 2015 | 2 | 2015 |
3-D FDFD non-conformal domain decomposition method for modeling RDL traces on silicon interposer B Xie, M Swaminathan, KJ Han, J Xie 2014 IEEE 18th Workshop on Signal and Power Integrity (SPI), 1-4, 2014 | 2 | 2014 |
Power Delivery Decoupling Scheme for EMIB Packages B Xie, J Xie 2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging …, 2019 | | 2019 |
Modeling and simulation of silicon interposers for 3-d integrated systems B Xie Georgia Institute of Technology, 2014 | | 2014 |