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Arnau Casadevall-Saiz
Arnau Casadevall-Saiz
Research Engineer
Verified email at uab.cat
Title
Cited by
Cited by
Year
A high-performance HOG extractor on FPGA
V Ngo, A Casadevall, M Codina, D Castells-Rufas, J Carrabina
arXiv preprint arXiv:1802.02187, 2018
152018
A pipeline hog feature extraction for real-time pedestrian detection on FPGA
V Ngo, A Casadevall, M Codina, D Castells-Rufas, J Carrabina
2017 IEEE East-West Design & Test Symposium (EWDTS), 1-6, 2017
52017
Low-power pedestrian detection system on FPGA
V Ngo, D Castells-Rufas, A Casadevall, M Codina, J Carrabina
UCAml 2019, 35, 2019
42019
A low-cost SVM classifier on FPGA for pedestrian detection
V Ngo, A Casadevall, M Codina, D Castells-Rufas, J Carrabina
Proceedings of the Jornadas de Computación Empotrada y Reconfigurable …, 2018
12018
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