Li-Shiuan Peh
Li-Shiuan Peh
Professor of Computer Science, National University of Singapore
Verified email at - Homepage
Cited by
Cited by
Energy-efficient computing for wildlife tracking: Design tradeoffs and early experiences with ZebraNet
P Juang, H Oki, Y Wang, M Martonosi, LS Peh, D Rubenstein
Proceedings of the 10th international conference on Architectural support …, 2002
Orion: A power-performance simulator for interconnection networks
HS Wang, X Zhu, LS Peh, S Malik
35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 …, 2002
ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration
AB Kahng, B Li, LS Peh, K Samadi
2009 Design, Automation & Test in Europe Conference & Exhibition, 423-428, 2009
GARNET: A detailed on-chip network model inside a full-system simulator
N Agarwal, T Krishna, LS Peh, NK Jha
2009 IEEE international symposium on performance analysis of systems and …, 2009
Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives
R Marculescu, UY Ogras, LS Peh, NE Jerger, Y Hoskote
IEEE Transactions on computer-aided design of integrated circuits and …, 2008
A delay model and speculative architecture for pipelined routers
LS Peh, WJ Dally
Proceedings HPCA seventh international symposium on high-performance …, 2001
DSENT-a tool connecting emerging photonics with electronics for opto-electronic networks-on-chip modeling
C Sun, CHO Chen, G Kurian, L Wei, J Miller, A Agarwal, LS Peh, ...
2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip, 201-210, 2012
Research challenges for on-chip interconnection networks
JD Owens, WJ Dally, R Ho, DN Jayasimha, SW Keckler, LS Peh
IEEE micro 27 (5), 96-108, 2007
Dynamic voltage scaling with links for power optimization of interconnection networks
L Shang, LS Peh, NK Jha
The Ninth International Symposium on High-Performance Computer Architecture …, 2003
Express virtual channels: Towards the ideal interconnection fabric
A Kumar, LS Peh, P Kundu, NK Jha
ACM SIGARCH Computer Architecture News 35 (2), 150-161, 2007
Power-driven design of router microarchitectures in on-chip networks
H Wang, LS Peh, S Malik
Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003
Signalguru: leveraging mobile phones for collaborative traffic signal schedule advisory
E Koukoumidis, LS Peh, MR Martonosi
Proceedings of the 9th international conference on Mobile systems …, 2011
On-chip networks
NDE Jerger, LS Peh
Morgan & Claypool Publishers, 2009
A 4.6 Tbits/s 3.6 GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS
A Kumary, P Kunduz, AP Singhx, LS Pehy, NK Jhay
2007 25th International Conference on Computer Design, 63-70, 2007
Leakage power modeling and optimization in interconnection networks
X Chen, LS Peh
Proceedings of the 2003 international symposium on Low power electronics and …, 2003
Orion 2.0: A power-area simulator for interconnection networks
AB Kahng, B Li, LS Peh, K Samadi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (1), 191-196, 2011
Virtual circuit tree multicasting: A case for on-chip hardware multicast support
NE Jerger, LS Peh, M Lipasti
ACM SIGARCH Computer Architecture News 36 (3), 229-240, 2008
Thermal modeling, characterization and management of on-chip networks
L Shang, L Peh, A Kumar, NK Jha
37th International Symposium on Microarchitecture (MICRO-37'04), 67-78, 2004
A statistical traffic model for on-chip interconnection networks
V Soteriou, H Wang, L Peh
14th IEEE International Symposium on Modeling, Analysis, and Simulation, 104-116, 2006
A power model for routers: Modeling alpha 21364 and infiniband routers
HS Wang, LS Peh, S Malik
IEEE Micro 23 (1), 26-35, 2003
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