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Yusung Kim
Yusung Kim
Verified email at intel.com
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Year
Spin-transfer torque devices for logic and memory: Prospects and perspectives
X Fong, Y Kim, K Yogendra, D Fan, A Sengupta, A Raghunathan, K Roy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
2402015
Magnetic tunnel junction mimics stochastic cortical spiking neurons
A Sengupta, P Panda, P Wijesinghe, Y Kim, K Roy
Scientific reports 6 (1), 30039, 2016
2062016
Spin-transfer torque memories: Devices, circuits, and systems
X Fong, Y Kim, R Venkatesan, SH Choday, A Raghunathan, K Roy
Proceedings of the IEEE 104 (7), 1449-1488, 2016
2022016
Multilevel spin-orbit torque MRAMs
Y Kim, X Fong, KW Kwon, MC Chen, K Roy
IEEE Transactions on Electron Devices 62 (2), 561-568, 2014
1232014
Failure Mitigation Techniques for 1T-1MTJ Spin-Transfer Torque MRAM Bit-cells
X Fong, Y Kim, SH Choday, K Roy
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on 22 (2 …, 2014
1002014
Write-optimized reliable design of STT MRAM
Y Kim, SK Gupta, SP Park, G Panagopoulos, K Roy
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
932012
Spin orbit torque based electronic neuron
A Sengupta, SH Choday, Y Kim, K Roy
Applied Physics Letters 106 (14), 2015
852015
DSH-MRAM: Differential Spin Hall MRAM for On-Chip Memories
Y Kim, SH Choday, K Roy
Electron Device Letters, IEEE 34 (10), 1259-1261, 2013
772013
SHE-NVFF: Spin Hall effect-based nonvolatile flip-flop for power gating architecture
KW Kwon, SH Choday, Y Kim, X Fong, SP Park, K Roy
IEEE Electron Device Letters 35 (4), 488-490, 2014
702014
Spin-orbit-torque-based spin-dice: A true random-number generator
Y Kim, X Fong, K Roy
IEEE Magnetics Letters 6, 1-4, 2015
552015
AWARE (asymmetric write architecture with redundant blocks): A high write speed STT-MRAM cache architecture
KW Kwon, SH Choday, Y Kim, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (4), 712-720, 2013
492013
Exploring spin transfer torque devices for unconventional computing
K Roy, D Fan, X Fong, Y Kim, M Sharad, S Paul, S Chatterjee, S Bhunia, ...
IEEE journal on Emerging and Selected Topics in Circuits and Systems 5 (1), 5-16, 2015
332015
Spin orbit torque based electronic neuron
A Sengupta, SH Choday, KIM Yusung, K Roy
US Patent App. 15/445,906, 2017
292017
Domino-style spin–orbit torque-based spin logic
MC Chen, Y Kim, K Yogendra, K Roy
IEEE Magnetics Letters 6, 1-4, 2015
112015
A physics-based statistical model for reliability of STT-MRAM considering oxide variability
CH Ho, GD Panagopoulos, SY Kim, Y Kim, D Lee, K Roy
2013 International Conference on Simulation of Semiconductor Processes and …, 2013
102013
A physical model to predict STT-MRAM performance degradation induced by TDDB
CH Ho, GD Panagopoulos, SY Kim, Y Kim, D Lee, K Roy
71st Device Research Conference, 59-60, 2013
92013
10-nm SRAM Design Using Gate-Modulated Self-Collapse Write-Assist Enabling 175-mV VMIN Reduction With Negligible Active Power Overhead
Z Guo, J Wiedemer, Y Kim, PS Ramamoorthy, PB Sathyaprasad, ...
IEEE Solid-State Circuits Letters 4, 6-9, 2020
82020
Energy-efficient high bandwidth 6T SRAM design on Intel 4 CMOS technology
Y Kim, C Ong, AM Pillai, H Jagadeesh, G Baek, I Rajwani, Z Guo, E Karl
IEEE Journal of Solid-State Circuits 58 (4), 1087-1093, 2022
52022
Correction: Corrigendum: Magnetic Tunnel Junction Mimics Stochastic Cortical Spiking Neurons
A Sengupta, P Panda, P Wijesinghe, Y Kim, K Roy
Scientific reports 7, 2017
3*2017
15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia
D Kim, Y Kim, A Shrivastava, G Park, AM Pillai, K Bannore, T Doan, ...
2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 278-280, 2024
2024
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