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Romain Dolbeau
Romain Dolbeau
SiPearl
Verified email at dolbeau.org - Homepage
Title
Cited by
Cited by
Year
HMPP: A hybrid multi-core parallel programming environment
R Dolbeau, S Bihan, F Bodin
Workshop on general purpose processing on graphics processing units (GPGPU …, 2007
3482007
Theoretical peak FLOPS per instruction set: a tutorial
R Dolbeau
The Journal of Supercomputing 74 (3), 1341-1377, 2018
562018
CASH: Revisiting hardware sharing in single-chip parallel processor
R Dolbeau, A Seznec
362002
One OpenCL to Rule Them All?
R Dolbeau, F Bodin, C de Verdiere
6th International Workshop on Multi-/Many-core Computing Systems (MuCoCoS-2013), 2013
322013
Evaluation of successive CPUs/APUs/GPUs based on an OpenCL finite difference stencil
H Calandra, R Dolbeau, P Fortin, JL Lamotte, I Said
2013 21st Euromicro International Conference on Parallel, Distributed, and …, 2013
192013
Directive-based heterogeneous programming–a GPU-accelerated RTM use case
S Bihan, GE Moulard, R Dolbeau, H Calandra, R Abdelkhalek
Proceedings of the 7th international conference on computing, communications …, 2009
172009
Theoretical Peak FLOPS per instruction set on modern Intel CPUs
R Dolbeau
http://www.dolbeau.name/dolbeau/publications/peak.pdf, 2015
112015
Hybrid CPU-GPU acceleration of the 3-D parallel code SPH-Flow
G Oger, E Jacquin, M Doring, PM Guilcher, R Dolbeau, PL Cabelguen, ...
112010
An Hybrid Data Transfer Optimization Technique for GPGPU
E Petit, F Bodin, R Dolbeau
7*2007
Multilevel simulation-based co-design of next generation HPC microprocessors
L Zaourar, M Benazouz, A Mouhagir, F Jebali, T Sassolas, JC Weill, ...
2021 International Workshop on Performance Modeling, Benchmarking and …, 2021
62021
Theoretical Peak FLOPS per instruction set on less conventional hardware
R Dolbeau
http://www.dolbeau.name/dolbeau/publications/peak-alt.pdf, 2016
6*2016
Forward seismic modeling on AMD accelerated processing unit
H Calandra, R Dolbeau, P Fortin, JL Lamotte, I Said
Rice Oil & Gas HPC Workshop, Houston, TX, USA, 2013
52013
Address Selection for Efficient Barriers on the IntelŽ Xeon Phi™
R Dolbeau
42013
Automated code generation for lattice quantum chromodynamics and beyond
D Barthou, O Brand-Foissac, O Pene, G Grosdidier, R Dolbeau, ...
Journal of Physics: Conference Series, Institute of Physics: Open Access …, 2014
32014
Homp description documentation
R Dolbeau, F Bodin
32007
On the efficiency of the accelerated processing unit for scientific computing
I Said, P Fortin, JL Lamotte, R Dolbeau, H Calandra
Proceedings of the 24th High Performance Computing Symposium, 25, 2016
22016
mencgen (formerly lavcGenetic), a genetic algorithm for mencoder encoding options
R Dolbeau
Feb 7, 1, 2006
22006
ASSIST: An FDO Source-to-Source Transformation Tool for HPC Applications
Y Lebras, ASC Rubial, R Dolbeau, W Jalby
International Workshop on Parallel Tools for High Performance Computing, 39-56, 2017
12017
An hybrid AES-256-GCM implementation for NEON CPU & CUDA GPU
R Dolbeau
12014
COMPESCE: A Co-design Approach for Memory Subsystem Performance Analysis in HPC Many-Cores
A Portero, C Falquez, N Ho, P Petrakis, S Nassyr, M Marazakis, ...
International Conference on Architecture of Computing Systems, 105-119, 2023
2023
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