Pedro Henrique Exenberger Becker
Pedro Henrique Exenberger Becker
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Demystifying power and performance bottlenecks in autonomous driving systems
PHE Becker, JM Arnau, A González
2020 IEEE International Symposium on Workload Characterization (IISWC), 205-215, 2020
A fast and accurate hybrid fault injection platform for transient and permanent faults
AL Sartor, PHE Becker, ACS Beck
Design Automation for Embedded Systems 23, 3-19, 2019
Simbah-FI: simulation-based hybrid fault injector
AL Sartor, PHE Becker, ACS Beck
2017 VII Brazilian Symposium on Computing Systems Engineering (SBESC), 94-101, 2017
Dynamic trade-off among fault tolerance, energy consumption, and performance on a multiple-issue VLIW processor
AL Sartor, PHE Becker, J Hoozemans, S Wong, ACS Beck
IEEE Transactions on Multi-Scale Computing Systems 4 (3), 327-339, 2017
KD bonsai: ISA-extensions to compress KD trees for autonomous driving tasks
PH E. Becker, JM Arnau, A González
Proceedings of the 50th Annual International Symposium on Computer …, 2023
A Low-Cost BRAM-Based Function Reuse for Configurable Soft-Core Processors in FPGAs
PHE Becker, AL Sartor, M Brandalero, TT Jost, S Wong, L Carro, ...
Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2018
Tuning the ISA for increased heterogeneous computation in MPSoCs
PHE Becker, JD Souza, ACS Beck
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020
Machine Learning-Based Processor Adaptability Targeting Energy, Performance, and Reliability
AL Sartor, PHE Becker, S Wong, R Marculescu, ACS Beck
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 158-163, 2019
Improving multitask performance and energy consumption with partial-ISA multicores
JD Souza, PHE Becker, ACS Beck
Journal of Parallel and Distributed Computing 153, 1-14, 2021
Increasing MPSoCs design space with partial-ISA processors
PHE Becker, JD Souza, ACS Beck
2019 26th IEEE International Conference on Electronics, Circuits and Systems …, 2019
Selectively supporting ISA-extensions to enhance heterogeneous MPSoC designs under power and area constraints
PHE Becker
BRAM-based function reuse for multi-core architectures in FPGAs
PHE Becker, AL Sartor, M Brandalero, ACS Beck
Microprocessors and Microsystems 63, 237-248, 2018
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